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? semiconductor components industries, llc, 2016 august, 2016 ? rev. 11 1 publication order number: mc10ep33/d mc10ep33, mc100ep33 3.3v/5v?ecl 4 divider description the mc10/100ep33 is an integrated 4 divider. the differential clock inputs. the v bb pin, an internally generated voltage supply, is available to this device only. for single-ended input conditions, the unused differential input is connected to v bb as a switching reference voltage. v bb may also rebias ac coupled inputs. when used, decouple v bb and v cc via a 0.01 f capacitor and limit current sourcing or sinking to 0.5 ma. when not used, v bb should be left open. the reset pin is asynchronous and is asserted on the rising edge. upon powerup, the internal flip-flops will attain a random state; the reset allows for the synchronization of multiple ep33?s in a system. the 100 series contains temperature compensation. features ? 320 ps propagation delay ? maximum frequency = > 4 ghz typical ? pecl mode operating range: v cc = 3.0 v to 5.5 v with v ee = 0 v ? necl mode operating range: v cc = 0 v with v ee = ? 3.0 v to ? 5.5 v ? open input default state ? safety clamp on inputs ? q output will default low with inputs open or at v ee ? v bb output ? these devices are pb-free, halogen free and are rohs compliant soic ? 8 nb d suffix case 751 ? 07 marking diagrams* tssop ? 8 dt suffix case 948r ? 02 alyw hp64 alyw kp64 1 8 1 8 1 8 www.onsemi.com *for additional marking information, refer to application note and8002/d . see detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. ordering information 1 8 hep64 alyw 1 8 kep64 alyw 1 8 dfn8 mn suffix case 506aa soic ? 8 nb tssop ? 8 dfn8 5q m 14 3l m 14 h = mc10 a = assembly location k = mc100 l = wafer lot 5q = mc10 y = year 3l = mc100 w = work week m = date code = pb-free package (note: microdot may be in either location)
mc10ep33, mc100ep33 www.onsemi.com 2 1 2 3 45 6 7 8 q v ee v cc figure 1. 8-lead pinout (top view) and logic diagram clk q clk v bb reset r 4 table 1. pin description pin clk*, clk * reset* ecl asynchronous reset function ecl clock inputs table 2. truth table clk x z clk x z reset z l q l f q h f z = low to high transition z = high to low transition f = divide by 4 function v bb reference voltage output q, q ecl data outputs v cc positive supply v ee negative supply * pins will default low when left open. ep (dfn8 only) thermal exposed pad must be connected to a sufficient thermal con- duit. electrically connect to the most neg- ative supply (gnd) or leave unconnected, floating open. figure 2. timing diagram clk reset q t rr table 3. attributes characteristics value internal input pulldown resistor 75 k internal input pullup resistor na esd protection human body model machine model charged device model > 4 kv > 200 v > 2 kv moisture sensitivity, indefinite time out of drypack (note 1) pb-free pkg soic ? 8 nb tssop ? 8 dfn8 level 1 level 3 level 1 flammability rating oxygen index: 28 to 34 ul ? 94 v ? 0 @ 0.125 in transistor count 91 devices meets or exceeds jedec spec eia/jesd78 ic latchup test 1. for additional information, see application note and8003/d .
mc10ep33, mc100ep33 www.onsemi.com 3 table 4. maximum ratings symbol parameter condition 1 condition 2 rating unit v cc pecl mode power supply v ee = 0 v 6 v v ee necl mode power supply v cc = 0 v ? 6 v v i pecl mode input voltage necl mode input voltage v ee = 0 v v cc = 0 v v i v cc v i v ee 6 ? 6 v i out output current continuous surge 50 100 ma i bb v bb sink/source 0.5 ma t a operating temperature range ? 40 to +85 c t stg storage temperature range ? 65 to +150 c ja thermal resistance (junction-to-ambient) 0 lfpm 500 lfpm soic ? 8 nb soic ? 8 nb 190 130 c/w jc thermal resistance (junction-to-case) standard board soic ? 8 nb 41 to 44 c/w ja thermal resistance (junction-to-ambient) 0 lfpm 500 lfpm tssop ? 8 tssop ? 8 185 140 c/w jc thermal resistance (junction-to-case) standard board tssop ? 8 41 to 44 c/w t sol wave solder < 2 to 3 sec @ 248 c 265 c ja thermal resistance (junction-to-ambient) 0 lfpm 500 lfpm dfn8 dfn8 129 84 c/w t sol wave solder (pb-free) < 2 to 3 sec @ 260 c 265 c jc thermal resistance (junction-to-case) (note 2) dfn8 35 to 40 c/w stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. 2. jedec standard multilayer board ? 2s2p (2 signal, 2 power) table 5. 10ep dc characteristics, pecl (v cc = 3.3 v, v ee = 0 v (note 1)) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max i ee power supply current 18 26 40 18 26 40 18 26 40 ma v oh output high voltage (note 2) 2165 2290 2415 2230 2355 2480 2290 2415 2540 mv v ol output low voltage (note 2) 1365 1490 1615 1430 1555 1680 1490 1615 1740 mv v ih input high voltage (single-ended) 2090 2415 2155 2480 2215 2540 mv v il input low voltage (single-ended) 1365 1690 1430 1755 1490 1815 mv v bb output voltage reference 1790 1890 1990 1855 1955 2055 1915 2015 2115 mv v ihcmr input high voltage common mode range (differential configuration) (note 3) 2.0 3.3 2.0 3.3 2.0 3.3 v i ih input high current 150 150 150 a i il input low current 0.5 0.5 0.5 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. input and output parameters vary 1:1 with v cc . v ee can vary +0.3 v to ? 2.2 v. 2. all loading with 50 to v cc ? 2.0 v. 3. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal.
mc10ep33, mc100ep33 www.onsemi.com 4 table 6. 10ep dc characteristics, pecl (v cc = 5.0 v, v ee = 0 v (note 1)) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max i ee power supply current 18 26 40 18 26 40 18 26 40 ma v oh output high voltage (note 2) 3865 3990 4115 3930 4055 4180 3990 4115 4240 mv v ol output low voltage (note 2) 3065 3190 3315 3130 3255 3380 3190 3315 3440 mv v ih input high voltage (single-ended) 3790 4115 3855 4180 3915 4240 mv v il input low voltage (single-ended) 3065 3390 3130 3455 3190 3515 mv v bb output voltage reference 3490 3590 3690 3555 3655 3755 3615 3715 3815 mv v ihcmr input high voltage common mode range (differential configuration) (note 3) 2.0 5.0 2.0 5.0 2.0 5.0 v i ih input high current 150 150 150 a i il input low current 0.5 0.5 0.5 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. input and output parameters vary 1:1 with v cc . v ee can vary +2.0 v to ? 0.5 v. 2. all loading with 50 to v cc ? 2.0 v. 3. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. table 7. 10ep dc characteristics, necl (v cc = 0 v; v ee = ? 5.5 v to ? 3.0 v (note 1)) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max i ee power supply current 18 26 40 18 26 40 18 26 40 ma voh output high voltage (note 2) ? 1135 ? 1010 ? 885 ? 1070 ? 945 ? 820 ? 1010 ? 885 ? 760 mv v ol output low voltage (note 2) ? 1935 ? 1810 ? 1685 ? 1870 ? 1745 ? 1620 ? 1810 ? 1685 ? 1560 mv v ih input high voltage (single-ended) ? 1210 ? 885 ? 1145 ? 820 ? 1085 ? 760 mv v il input low voltage (single-ended) ? 1935 ? 1610 ? 1870 ? 1545 ? 1810 ? 1485 mv v bb output voltage reference ? 1510 ? 1410 ? 1310 ? 1445 ? 1345 ? 1245 ? 1385 ? 1285 ? 1185 mv v ihcmr input high voltage common mode range (differential configuration) (note 3) v ee +2.0 0.0 v ee +2.0 0.0 v ee +2.0 0.0 v i ih input high current 150 150 150 a i il input low current 0.5 0.5 0.5 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. input and output parameters vary 1:1 with v cc . 2. all loading with 50 to v cc ? 2.0 v. 3. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal.
mc10ep33, mc100ep33 www.onsemi.com 5 table 8. 100ep dc characteristics, pecl (v cc = 3.3 v, v ee = 0 v (note 1)) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max i ee power supply current 18 26 40 23 26 45 23 26 45 ma v oh output high voltage (note 2) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mv v ol output low voltage (note 2) 1355 1480 1605 1355 1480 1605 1355 1480 1605 mv v ih input high voltage (single-ended) 2075 2420 2075 2420 2075 2420 mv v il input low voltage (single-ended) 1355 1675 1355 1675 1355 1675 mv v bb output voltage reference 1775 1875 1975 1775 1875 1975 1775 1875 1975 mv v ihcmr input high voltage common mode range (differential configuration) (note 3) 2.0 3.3 2.0 3.3 2.0 3.3 v i ih input high current 150 150 150 a i il input low current 0.5 0.5 0.5 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. input and output parameters vary 1:1 with v cc . v ee can vary +0.3 v to ? 2.2 v. 2. all loading with 50 to v cc ? 2.0 v. 3. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. table 9. 100ep dc characteristics, pecl (v cc = 5.0 v, v ee = 0 v (note 1)) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max i ee power supply current 18 26 40 23 26 45 23 26 45 ma v oh output high voltage (note 2) 3855 3980 4105 3855 3980 4105 3855 3980 4105 mv v ol output low voltage (note 2) 3055 3180 3305 3055 3180 3305 3055 3180 3305 mv v ih input high voltage (single-ended) 3775 4120 3775 4120 3775 4120 mv v il input low voltage (single-ended) 3055 3375 3055 3375 3055 3375 mv v bb output voltage reference 3475 3575 3675 3475 3575 3675 3475 3575 3675 mv v ihcmr input high voltage common mode range (differential configuration) (note 3) 2.0 5.0 2.0 5.0 2.0 5.0 v i ih input high current 150 150 150 a i il input low current 0.5 0.5 0.5 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. input and output parameters vary 1:1 with v cc . v ee can vary +2.0 v to ? 0.5 v. 2. all loading with 50 to v cc ? 2.0 v. 3. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal.
mc10ep33, mc100ep33 www.onsemi.com 6 table 10. 100ep dc characteristics, necl (v cc = 0 v; v ee = ? 5.5 v to ? 3.0 v (note 1)) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max i ee power supply current 18 26 40 23 26 45 23 26 45 ma v oh output high voltage (note 2) ? 1145 ? 1020 ? 895 ? 1145 ? 1020 ? 895 ? 1145 ? 1020 ? 895 mv v ol output low voltage (note 2) ? 1945 ? 1820 ? 1695 ? 1945 ? 1820 ? 1695 ? 1945 ? 1820 ? 1695 mv v ih input high voltage (single-ended) ? 1225 ? 880 ? 1225 ? 880 ? 1225 ? 880 mv v il input low voltage (single-ended) ? 1945 ? 1625 ? 1945 ? 1625 ? 1945 ? 1625 mv v bb output voltage reference ? 1525 ? 1425 ? 1325 ? 1525 ? 1425 ? 1325 ? 1525 ? 1425 ? 1325 mv v ihcmr input high voltage common mode range (differential configuration) (note 3) v ee +2.0 0.0 v ee +2.0 0.0 v ee +2.0 0.0 v i ih input high current 150 150 150 a i il input low current 0.5 0.5 0.5 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. input and output parameters vary 1:1 with v cc . 2. all loading with 50 to v cc ? 2.0 v. 3. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. table 11. ac characteristics (v cc = 0 v; v ee = ? 3.0 v to ? 5.5 v or v cc = 3.0 v to 5.5 v; v ee = 0 v (note 1)) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max v opp output voltage amplitude (see figure 4) f in < 4.0 ghz f in < 4.5 ghz 700 600 700 600 700 600 mv t plh , t phl propagation delay to clk/q output differential reset/q 300 370 380 420 440 470 300 370 380 420 440 470 320 400 400 450 460 500 ps t rr set/rest recovery 150 100 200 100 200 100 ps t pw minimum pulse width reset 550 480 550 480 550 480 ps t jitter random clock jitter (rms) 0.2 2 0.2 2 0.2 2 ps v pp input voltage swing (differential configuration) 150 800 1200 150 800 1200 150 800 1200 mv t r t f output rise/fall times q, q (20% ? 80%) 90 170 200 100 180 250 120 200 280 ps note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. measured using a 750 mv source, 50% duty cycle clock source. all loading with 50 to v cc ? 2.0 v.
mc10ep33, mc100ep33 www.onsemi.com 7 figure 3. typical termination for output driver and device evaluation (see application note and8020/d ? termination of ecl logic devices) driver device receiver device qd q d z o = 50 z o = 50 50 50 v tt v tt = v cc ? 2.0 v figure 4. input frequency (f in ) versus output voltage (v opp ) f in , input frequency (mhz) v opp , output voltage (mv) 5000 4000 3000 2000 1000 0 900 800 700 600 500 400 300 200 100 0 4500 3500 2500 1500 500
mc10ep33, mc100ep33 www.onsemi.com 8 ordering information device package shipping ? mc10ep33dg soic ? 8 nb (pb-free) 98 units / tube mc10ep33dr2g soic ? 8 nb (pb-free) 2500 / tape & reel mc10ep33dtg tssop ? 8 (pb-free) 100 units / tube mc10ep33dtr2g tssop ? 8 (pb-free) 2500 / tape & reel mc10ep33mnr4g dfn8 (pb-free) 1000 / tape & reel mc100ep33dg soic ? 8 nb (pb-free) 98 units / tube MC100EP33DR2G soic ? 8 nb (pb-free) 2500 / tape & reel mc100ep33dtg tssop ? 8 (pb-free) 100 units / tube mc100ep33dtr2g tssop ? 8 (pb-free) 2500 / tape & reel mc100ep33mnr4g dfn8 (pb-free) 1000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d . resource reference of application notes an1405/d ? ecl clock distribution techniques an1406/d ? designing with pecl (ecl at +5.0 v) an1503/d ? eclinps i/o spice modeling kit an1504/d ? metastability and the eclinps family an1568/d ? interfacing between lvds and ecl an1672/d ? the ecl translator guide and8001/d ? odd number counters design and8002/d ? marking and date codes and8020/d ? termination of ecl logic devices and8066/d ? interfacing with eclinps and8090/d ? ac characteristics of ecl devices
mc10ep33, mc100ep33 www.onsemi.com 9 package dimensions soic ? 8 nb d suffix case 751 ? 07 issue ak seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb-free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint*
mc10ep33, mc100ep33 www.onsemi.com 10 package dimensions dim min max min max inches millimeters a 2.90 3.10 0.114 0.122 b 2.90 3.10 0.114 0.122 c 0.80 1.10 0.031 0.043 d 0.05 0.15 0.002 0.006 f 0.40 0.70 0.016 0.028 g 0.65 bsc 0.026 bsc l 4.90 bsc 0.193 bsc m 0 6 0 6 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. terminal numbers are shown for reference only. 6. dimension a and b are to be determined at datum plane -w-. seating plane pin 1 1 4 85 detail e b c d a g detail e f m l 2x l/2 ? u ? s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) ? t ? ? v ? ? w ? 0.25 (0.010) 8x ref k ident k 0.25 0.40 0.010 0.016 tssop ? 8 dt suffix case 948r ? 02 issue a
mc10ep33, mc100ep33 www.onsemi.com 11 package dimensions ?? ?? case 506aa issue f notes: 1. dimensioning and tolerancing per asme y14.5m, 1994 . 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.20 mm from terminal tip. 4. coplanarity applies to the exposed pad as well as the terminals. a d e b c 0.10 pin one 2x reference 2x top view side view bottom view a l (a3) d2 e2 c c 0.10 c 0.10 c 0.08 note 4 a1 seating plane e/2 e 8x k note 3 b 8x 0.10 c 0.05 c a b b dim min max millimeters a 0.80 1.00 a1 0.00 0.05 a3 0.20 ref b 0.20 0.30 d 2.00 bsc d2 1.10 1.30 e 2.00 bsc e2 0.70 0.90 e 0.50 bsc k l 0.25 0.35 1 4 8 5 *for additional information on our pb-free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 2.30 0.50 0.50 8x dimensions: millimeters 0.30 pitch 8x 1 package outline recommended l1 detail a l optional constructions l detail b detail a l1 ??? 0.10 0.30 ref 0.90 1.30 ?? detail b mold cmpd exposed cu alternate constructions ?? ?? on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . a listing of on semiconductor?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent ? marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does o n semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. buyer is responsible for its products and applications using on semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by on semiconductor. ?typical? parameters which may be provided in on semiconductor data sheets and/or specifications can and do vary in dif ferent applications and actual performance may vary over time. all operating parameters, including ?typic als? must be validated for each customer application by customer?s technical experts. on semiconductor does not convey any license under its patent rights nor the right s of others. on semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any fda class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. should buyer purchase or use on semicondu ctor products for any such unintended or unauthorized application, buyer shall indemnify and hold on semiconductor and its officers, employees, subsidiaries, affiliates, and distrib utors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that on semiconductor was negligent regarding the design or manufacture of the part. on semiconductor is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 mc10ep33/d literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative eclinps is a trademark of semiconductor components industries, llc (scillc) or its subsidiaries in the united states and/or oth er countries.

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